Workshop on Cryptographic Hardware and Embedded Systems 2005 (CHES 2005)

The Roxburghe Hotel
Edinburgh, Scotland
Monday Evening August 29th - Thursday September 1st, 2005

[Monday, August 29] [Tuesday, August 30] [Wednesday, August 31] [Thursday, September 1]


Monday, August 29
18:00-20:00 Registration at the Conference Hotel
19:00-21:00 Welcome Reception (wine, sandwich and canapés)

Tuesday, August 30
  SessionAuthorsTalk's Title
8:00 - ... Registration desk reopens
8:20 - 9:00Tea, Coffee and Danish
9:00 - 9:15 Welcome to CHES 2005
9:15 - 10:30 Session 1:
Side Channels I
William Dupuy, Sébastien Kunz-Jacques Resistance of Randomized Projective Coordinates Against Power Analysis
Dakshi Agrawal, Josyula R Rao, Pankaj Rohatgi, Kai Schramm Templates as Master Keys
Werner Schindler, Kerstin Lemke, Christof Paar A Stochastic Model for Differential Side Channel Cryptanalysis
10:30 - 11:00Coffee break
11:00 - 12:00 Invited Talk Ross Anderson
University of Cambridge
What Identity Systems Can and Cannot Do
12:00- 12:50 Session 2:
Arithmetic for Cryptanalysis
Jean-Sébastien Coron, David Lefranc, Guillaume Poupard a new baby-step giant-step algorithm and some applications to cryptanalysis
P.J. Green, R. Noad, N.P. Smart Further Hidden Markov Model Cryptanalysis
12:50 - 14:00Buffet lunch in hotel quadrangle
14:00 - 15:15 Session 3:
Low Resources
Johann Großschädl, Roberto M. Avanzi, Erkay Savaş, Stefan Tillich Energy-Efficient Software Implementation of Long Integer Modular Arithmetic
Katsuyuki Okeya, Tsuyoshi Takagi, Camille Vuillaume Short-Memory Scalar Multiplication on Koblitz Curves
David Hwang, Lejla Batina, Alireza Hodjat, Bart Preneel, Ingrid Verbauwhede Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051 microprocessor
15:15 - 15:45Coffee break
15:45 - 17:00 Session 4:
Special Purpose Hardware
Jens Franke, Thorsten Kleinjung, Christof Paar, Jan Pelzl, Christine Priplata, Colin Stahlke SHARK - A Realizable Special Hardware Sieving Device for Factoring 1024-bit Integers
Willi Geiselmann, Adi Shamir, Rainer Steinwandt, Eran Tromer Scalable Hardware for Sparse Systems of Linear Equations, with Applications to Integer Factorization
Marco Bucci, Raimondo Luzzi Design of Testable Random Bit Generators
19:00 - 20:30 Dinner in Hotel's George Suite
21:00 - 22:30 Rump Session

Wednesday, August 31
Time Event
  SessionAuthorsTalk's Title
8:30 - ... Registration desk opens
8:20 - 9:00 Tea, Coffee and Danish
09:00 - 10:15 Session 5:
Hardware Attacks and Countermeasures I
Stefan Mangard, Norbert Pramstaller, Elisabeth Oswald Successfully Attacking Masked AES Hardware Implementations
Thomas Popp, Stefan Mangard Masked Dual-Rail Pre-Charge Logic: DPA-Resistance without Routing Constraints
Wieland Fischer, Berndt M. Gammel Masking at Gate Level in the Presence of Glitches
10:15 - 10:45Coffee Break
10:45 - 12:25 Session 6:
Arithmetic for Cryptography
Marcelo E. Kaihara, Naofumi Takagi Bipartite Modular Multiplication
Laszlo Hars Fast Truncated Multiplication and its Applications in Cryptography
Martin Seysen Using an RSA accelerator for modular inversion
David Cyganski, Berk Sunar Comparison of Bit and Word Level Algorithms for Evaluating Unstructured Functions over Finite Rings
12:25 - 14:00Buffet lunch in hotel quadrangle
14:00 - 15:15 Session 7:
Side Channel II (EM)
C.Gebotys, S.Ho, C.Tiu EM Analysis of Rijndael and ECC on a Wireless Java-based PDA
Markus G. Kuhn Security Limits for Compromising Emanations
Huiyun Li, Theodore Markettos,Simon Moore Security Evaluation Against Electromagnetic Analysis at Design Time
15:15 - 15:45Coffee break
15:45 - 16:35 Session 8:
Side Channel III
Marc Joye, Pascal Paillier, Berry Schoenmakers On Second-Order Differential Power Analysis
Eric Peeters, François-Xavier Standaert, Nicolas Donckers,Jean-Jacques Quisquater Improved Higher-Order Side-Channel Attacks with FPGA Experiments
16:35 - 17:00 Session 9:
Trusted Computing
Ulrich Kühn, Klaus Kursawe,Stefan Lucks, Ahmad-Reza Sadeghi,Christian Stüble Secure Data Management in Trusted Computing
17:00 - 17:15Break
17:15 - 18:45 Invited Talk Thomas Wille
Philips Semiconductors Inc
Scurity of Identification Products: How to Manage
19:30 - 23:00Banquet at the Royal Museum (name badge required)

Thursday, September 1
Time Event
  SessionAuthorsTalk's Title
8:30 - ... Registration desk opens
8:20 - 9:00 Tea, Coffee and Danish
09:00 - 10:00 Invited Talk Jim Ward
Trusted Computing Group and IBM
Trusted Computing in Embedded Systems
10:00 - 10:50 Session 10:
Hardware Attacks and Countermeasures II
Sergei Skorobogatov Data Remanence in Flash Memory Devices
Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede Prototype IC with WDDL and Differential Routing DPA Resistance Assessment
10:50 - 11:20Coffee Break
11:20 - 12:10 Session 11:
Hardware Attacks and Countermeasures III
Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa DPA Leakage Models for CMOS Logic Circuits
Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu, Renaud Pacalet The "backend duplication" method
12:10 - 13:30 Buffet lunch in hotel quadrangle
13:30 - 14:20 Session 12:
Efficient Hardware I
P. Grabher, D. Page Hardware Acceleration of the Tate Pairing in Characteristic Three
T. Kerins, W. P. Marnane, E. M. Popovici, P.S.L.M. Barreto Efficient hardware for the Tate pairing calculation in characteristic three
14:20 - 14:50Coffee Break
14:50 - 15:40 Session 13:
Efficient Hardware II
T. Good and M. Benaissa AES on FPGA from the fastest to the smallest
D. Canright A Very Compact S-box for AES
15:40 - 16:00 Best Paper Awards and Concluding Remarks

Note: Regular presentations are 25 minutes long including questions.