Workshop on Cryptographic Hardware and Embedded Systems 2011 (CHES 2011)

Nara, Japan
Wednesday September 28th - Saturday October 1st.

[Wednesday, September 28] [Thursday, September 29] [Friday, September 30] [Saturday, October 1]


Wednesday, September 28
17:30 - Registration
Nara National Museum
18:00 - 20:30Welcome Reception
Nara National Museum

Thursday, September 29
08:00 - Registration
08:45 - 09:00Opening Remarks
Todai-ji Cultural Center
09:00 - 10:15 Session 1:
FPGA Implementation

Chair: Kris Gaj

Todai-ji Cultural Center
Philipp Grabher, Johann Großschädl, Simon Hoerder, Kimmo Järvinen, Dan Page, Stefan Tillich, and Marcin Wójcik An Exploration of Mechanisms for Dynamic Cryptographic Instruction Set Extension
Mehrdad Majzoobi, Farinaz Koushanfar, and Srinivas Devadas FPGA-based True Random Number Generation using Circuit Metastability with Adaptive Feedback Control
Tim Güneysu and Amir Moradi Generic Side-Channel Countermeasures for Reconfigurable Devices
10:15 - 10:45Morning Break
B1F Small Hall in Todai-ji Cultural Center
10:45 - 12:25 Session 2:

Chair: Kazuo Sakiyama

Todai-ji Cultural Center
Christophe Clavier, Benoit Feix, Georges Gagnerot, Mylène Roussellet, and Vincent Verneuil Improved Collision-Correlation Power Analysis on First Order Protected AES
Emmanuel Prouff and Thomas Roche Higher-Order Glitches Free Implementation of the AES using Secure Multi-Party Computation Protocols
Louis Goubin and Ange Martinelli Protecting AES with Shamir's Secret Sharing Scheme
HeeSeok Kim, Seokhie Hong, and Jongin Lim A Fast and Provably Secure Higher-Order Masking of AES S-box
12:25 - 14:00Lunch
Yumekaze Hiroba
14:00 - 15:00 Invited Talk I:
Chair: Bart Preneel

Todai-ji Cultural Center
Ernie Brickell (Intel) Technologies to Improve Platform Security
15:00 - 15:30Afternoon Break
B1F Small Hall in Todai-ji Cultural Center
15:30 - 16:45 Session 3:
Elliptic Curve Cryptosystems

Chair: Chen-Mou Cheng

Todai-ji Cultural Center
Jonathan Taverne, Armando Faz-Hernández, Diego F. Aranha, Francisco Rodríguez-Henríquez, Darrel Hankerson, and Julio López Software Implementation of Binary Elliptic Curves: Impact of the Carry-less Multiplier on Scalar Multiplication
Daniel J. Bernstein, Niels Duif, Tanja Lange, Peter Schwabe, and Bo-Yin Yang High-Speed High-Security Signatures
Junfeng Fan, Benedikt Gierlichs, and Frederik Vercauteren To Infinity and Beyond: Combined Attack on ECC using Points of Low Order
16:45 - 22:00Excursion
Heijyo Palace & Osaka Aquarium Kaiyukan

Friday, September 30
08:15 - 08:45Deer Gathering
Nara Park
08:30 - Registration
09:00 - 10:15 Session 4:

Chair: Marc Joye

Todai-ji Cultural Center
Michael Schneider and Norman Göttert Random Sampling for Short Lattice Vectors on Graphics Cards
Po-Chun Kuo, Michael Schneider, Özgür Dagdelen, Jan Reichelt, Johannes Buchmann, Chen-Mou Cheng, and Bo-Yin Yang Extreme Enumeration on GPU and in Clouds
Éric Brier, David Naccache, Phong Q. Nguyen, and Mehdi Tibouchi Modulus Fault Attacks against RSA-CRT Signatures
10:15 - 10:45Morning Break
B1F Small Hall in Todai-ji Cultural Center
10:45 - 12:25 Session 5:
Side Channel Attacks

Chair: Benedikt Gierlichs

Todai-ji Cultural Center
David Oswald and Christof Paar Breaking Mifare DESFire MF3ICD40: Power Analysis and Templates in the Real World
Mathieu Renauld, Dina Kamel, François-Xavier Standaert, and Denis Flandre Information Theoretic and Security Analysis of a 65-nanometer DDSLL AES S-box
Laurie Genelle, Emmanuel Prouff, and Michaël Quisquater Thwarting Higher-Order Side Channel Analysis with Additive and Multiplicative Maskings
Marcel Medwed and François-Xavier Standaert Extractors against Side-Channel Attacks: Weak or Strong?
12:25 - 14:00Lunch
Yumekaze Hiroba
14:00 - 15:00 Invited Talk II:
Chair: Tsuyoshi Takagi

Todai-ji Cultural Center
Tetsuya Tominaga (NTT Corporation) Standardization Works for Security regarding the Electromagnetic Environment
(Demo video)
15:00 - 15:50 Session 6:
Fault Attacks

Chair: Guido Bertoni

Todai-ji Cultural Center
Patrick Derbez, Pierre-Alain Fouque, and Delphine Leresteux Meet-in-the-Middle and Impossible Differential Fault Analysis on AES
Amir Moradi, Oliver Mischke, Christof Paar, Yang Li, Kazuo Ohta, and Kazuo Sakiyama On the Power of Fault Sensitivity Analysis and Collision Side-Channel Attacks in a Combined Setting
15:50 - 17:50Guided Tour
in Nara Park
18:45 - 21:30Banquet & Rump Session
Hotel Nikko Nara

Saturday, October 1
08:30 - Registration
09:00 - 10:15 Session 7:
Lightweight Symmetric Algorithms

Chair: Naofumi Homma

Todai-ji Cultural Center
Andrey Bogdanov, Miroslav Knežević, Gregor Leander, Deniz Toz, Kerem Varιcι, and Ingrid Verbauwhede SPONGENT: A Lightweight Hash Function
Jian Guo, Thomas Peyrin, Axel Poschmann, and Matt Robshaw The LED Block Cipher
Kyoji Shibutani, Takanori Isobe, Harunaga Hiwatari, Atsushi Mitsuda, Toru Akishita, and Taizo Shirai Piccolo: An Ultra-Lightweight Blockcipher
10:15 - 10:45Morning Break
B1F Small Hall in Todai-ji Cultural Center
10:45 - 12:25 Session 8:

Chair: Helena Handschuh

Todai-ji Cultural Center
Meng-Day (Mandel) Yu, David M'Raihi, Richard Sowell, and Srinivas Devadas Lightweight and Secure PUF Key Storage using Limits of Machine Learning
Stefan Katzenbeisser, Ünal Koçabas, Vincent van der Leest, Ahmad-Reza Sadeghi, Geert-Jan Schrijen, Heike Schröder, and Christian Wachsmann Recyclable PUFs: Logically Reconfigurable PUFs
Dai Yamamoto, Kazuo Sakiyama, Mitsugu Iwamoto, Kazuo Ohta, Takao Ochiai, Masahiko Takenaka, and Kouichi Itoh Uniqueness Enhancement of PUF Responses Based on the Locations of Random Outputting RS Latches
Aswin Raghav Krishna, Seetharam Narasimhan, Xinmu Wang, and Swarup Bhunia MECCA: A Robust Low-Overhead PUF using Embedded Memory Array
12:25 - 14:00Lunch
Yumekaze Hiroba
14:00 - 15:40 Session 9:
Public-Key Cryptosystems

Chair: Toru Akishita

Todai-ji Cultural Center
Ray C.C. Cheung, Sylvain Duquesne, Junfeng Fan, Nicolas Guillermin, Ingrid Verbauwhede, and Gavin Xiaoxu Yao FPGA Implementation of Pairings using Residue Number System and Lazy Reduction
Santosh Ghosh, Dipanwita Roy Chowdhury, and Abhijit Das High Speed Cryptoprocessor for ηT Pairing on 128-bit Secure Supersingular Elliptic Curves over Characteristic Two Fields
Michael Hutter and Erich Wenger Fast Multi-Precision Multiplication for Public-Key Cryptography on Embedded Microprocessors
Albrecht Petzoldt, Enrico Thomae, Stanislav Bulygin, and Christopher Wolf Small Public Keys and Fast Verification for Multivariate Quadratic Public Key Systems
15:40 - 16:00Afternoon Break
B1F Small Hall in Todai-ji Cultural Center
16:00 - 16:50 Session 10:
Hash Functions

Chair: Mitsuru Matsui

Todai-ji Cultural Center
Ekawat Homsirikamol, Marcin Rogawski, and Kris Gaj Throughput vs. Area Trade-offs in High-Speed Architectures of Five Round 3 SHA-3 Candidates Implemented using Xilinx and Altera FPGAs
Joppe W. Bos, Onur Özen, and Martijn Stam Efficient Hashing using the AES Instruction Set
16:50 - 17:00Concluding Remarks
Todai-ji Cultural Center