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Reducing the Gate Count of Bitslice DES
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Abstract: | This paper describes various techniques to reduce the number of logic gates needed to implement the DES S-boxes in bitslice software. Using standard logic gates, an average of 56 gates per S-box was achieved, while an average of 51 was produced when non-standard gates were utilized. This is an improvement over the previous best result, which used an average of 61 non-standard gates. |
BibTeX
@misc{eprint-2000-11395, title={Reducing the Gate Count of Bitslice DES}, booktitle={IACR Eprint archive}, keywords={implementation / DES}, url={http://eprint.iacr.org/2000/051}, note={ mkwan@darkside.com.au 11238 received 8 Oct 2000}, author={Matthew Kwan}, year=2000 }