Workshop on Cryptographic Hardware and Embedded Systems 2003 (CHES 2003)

Cologne, German
Sunday September 7th - Wednesday 10th, 2003

[Sunday, September 7] [Monday, September 8] [Tuesday, September 9] [Wednesday, September 10]


Sunday, September 7th
18:00 Welcome Reception and Registration at Conference Hotel

Monday, September 8th
8:30 - 8:45 Welcome
  Session Authors Talk's Title
8:45 - 10:00 Session 1: Side Channel Attack Methodology Dakshi Agrawal, Josyula R. Rao, Pankaj Rohatgi Multi-Channel Attacks
Chris Karlof, David Wagner Hidden Markov Model Cryptanalysis
Berna Siddika Örs, Elisabeth Oswald, Bart Preneel Power-Analysis Attacks on an FPGA--First Experimental Results
10:00 - 10:30Coffee
10:30 - 11:30 Invited Talk Adi Shamir RSA Security Analysis
11:30 - 12:00 Session 2: Hardware Factorization Willi Geiselmann, Rainer Steinwandt Hardware to Solve Sparse Systems of Linear Eqns over GF(2)
12:00 - 13:20Lunch
13:20 - 15:00 Session 3: Symmetric Ciphers -- Side-Channel Attacks and Counter-Measures Yukiyasu Tsunoo, Teruo Saito, Tomoyasu Suzaki, M. Shigeri, Hiroshi Miyauchi Cryptanalysis of DES Implemented on Computers With Cache
Gilles Piret, Jean-Jacques Quisquater A Differential Fault Attack Technique Against SPN Structures, with Application to the AES and KHAZAD
Jovan Dj. Goliç DeKaRT: A New Paradigm for Key-Dependent Reversible Circuits
Marc Joye, Pascal Paillier GCD-Free Algorithms for Computing Modular Inverses
15:00 - 15:30Coffee
15:30 - 16:45 Session 4: Secure Hardware Logic Ramesh Karri, Grigori Kuznetsov, Michael Goessel Parity-based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers
Kris Tiri, Ingrid Verbauwhede Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology
Jacques J.A. Fournier, Simon Moore, Huiyun Li, Robert Mullins, George Taylor Security Evaluation of Asynchronous Circuits
16:45 - 17:45 Panel Session Marc Joye (Gemplus)
François Koeune (UCL, Louvain)
Bart Preneel (COSIC, Leuven)
Pankaj Rohatgi (IBM)
Jean-Pierre Seifert (Infineon)
Colin Walter (Comodo, chairman)
Are software and hardware counter-measures winning the war against side-channel leakage?

Tuesday, September 9th
 SessionAuthorsTalk's Title
08:45 - 10:00 Session 5: Random Number Generators Michael Epstein, Laszlo Hars, Raymond Krasinski, Martin Rosner, Hao Zheng Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts
Boaz Barak, Ronen Shaltiel, Eran Tromer True Random Number Generators Secure in a Changing Environment
Markus Dichtl How to Predict the Output of a Hardware Random Number Generator
10:00 - 10:30Coffee
10:30 - 11:45 Session 6: Efficient Multiplication Arash Reyhani-Masoleh, M. Anwar Hasan On Time and Space Complexities of Bit Parallel Polynomial Basis Multiplier
Jean-François Dhem Efficient Modular Reduction Algorithm in Fq[x] and its Application to "Left to Right" Modular Multiplication in F2[x]
Benoit Chevallier-Mames, Marc Joye, Pascal Paillier Faster Double-Size Modular Multiplication From Euclidean Multipliers
11:45 - 13:10Lunch
13:10 - 14:00 Session 7: More on Efficient Arithmetic Soonhak Kwon, Chang Hoon Kim, Chun Pyo Hong Efficient Exponentiation for a Class of Finite Fields GF(2n) determined by Gauss Periods
Jean-Sébastien Coron, Alexei Tchulkine A New Algorithm for Switching from Arithmetic to Boolean Masking
14:00 - 15:15 Session 8: Attacks on Asymmetric Crypto-Systems Pierre-Alain Fouque, Gwenaelle Martinet, Guillaume Poupard Attacking Unbalanced RSA-CRT using SPA
Pierre-Alain Fouque, Frederic Valette The Doubling Attack: Why Upwards is better than Downwards
Nigel Smart An Analysis of Goubin's Refined Power Analysis Attack
15:15 - 15:45Coffee
15:45 - 16:10 Session 8 contd. Julien Cathalo, François Koeune, Jean-Jacques Quisquater A New Type of Timing Attack: Application to GPS
16:10 - 17:10 Invited Talk Frank Stajano The Security Challenges of Ubiquitous Computing

Wednesday, September 10th
 SessionAuthorsTalk's Title
08:45 - 09:45 Invited Talk Hans Dobbertin Algebraic Structures in the Design of AES - Cryptographically Strong or Risky?
09:45 - 10:15Coffee
10:15 - 11:30 Session 9: Implementation of Symmetric Ciphers Akashi Satoh, Sumio Morioka Unified Hardware Architecture for the 128-bit Block Ciphers AES and Camellia
Pawel Chodowiec, Kris Gaj Very Compact FPGA Implementation of the AES Algorithm
François-Xavier Standaert, Gael Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat Efficient Implementation of Rijndael in Reconfigurable Hardware: Improvements and Design Tradeoffs
11:30 - 11:55 Session 10: Hyperelliptic Curve Cryptography Jan Pelzl, Thomas Wollinger, Jorge Guajardo, Christof Paar Hyperelliptic Curve Cryptosystems: Closing the Performance Gap to Elliptic Curves
11:55 - 12:55Lunch
12:55 - 13:20 Session 10 contd. Roberto M. Avanzi Countermeasures against Differential Analysis for Hyperelliptic Curve Cryptosystems
13:20 - 14:10 Session 11: Counter-Measures to Side Channel Leakage Kouichi Itoh, Tetsuya Izu, Masahiko Takenaka A Practical Countermeasure against Address-bit Differential Power Analysis
Katsuyuki Okeya, Tsuyoshi Takagi A More Flexible Countermeasure against Side Channel Attacks using Window Method
14:10 - 15:00 Session 12: Attacks against Standards Jolyon Clulow On the Security of PKCS #11
Vlastimil Klima, Ondrej Pokorný, Tomas Rosa Attacking RSA-based Sessions in SSL/TLS
15:00 - 15:05Concluding Remarks
15:05 - 15:35Coffee