International Association for Cryptologic Research

Ph.D. Database

The aim of the IACR Ph.D. database is twofold. On the first hand, we want to offer an overview of Ph.D. already completed in the domain of cryptology. Where possible, this should also include a subject classification, an abstract, and access to the full text. On the second hand, it deals with Ph.D. subjects currently under investigation. This way, we provide a timely map of contemporary research in cryptology. All entries or changes need to be approved by an editor. You can contact them via phds (at)


Sylvain Guilley (#708)
Name Sylvain Guilley
Topic of his/her doctorate. Geometrical Countermeasures to Side-Channel Attacks
Category implementation
Ph.D. Supervisor(s) Renaud Pacalet
Year of completion 2007
Abstract This manuscript is concerned with the securization of electronic circuits against attacks that target their implementation. Cryptographic algorithms have been traditionally studied to withstand theoretical attacks. Now, when those algorithms are implemented in concrete devices, new attacks become possible. Indeed, some information can be extracted passively (by observation) or actively (by fault injection) from the circuits. This supplementary information, customarily referred to as "side-channel", empowers the prospective attackers. The most vulnerable devices are those that are supplied energy from the outside, such as the smartcards with or without contacts, or the embedded systems in general. The electromagnetic radiations also constitute a side-channel modality, that allows an attacker to extract secrets delianalysis tely. We first show that side-channel attacks (or SCA in brief) are structural attacks, insofar as they are inherent to information processing. Remarkably, it happens that cryptographic algorithms are especially vulnerable to SCAs, notably because of the constitutive features of the Boolean functions involved in their architecture. In the case of symmetrical encryption, we prove that SCAs are unavoidable, since the minimal information leakage is exactly equal to that of the key. Moreover, technological design constraints increase the strength of the attacks. We continue by seeking means to reduce to the minimum the information leaked from a circuit. On the example of a DES co-processor, we show how to exploit concretely information leakage. We describe into great details the attack on the first and the last round of an unprotected register-transfer level architecture of DES. The vulnerabilities identified on the example of the DES co-processor call for recommendations about the design of a robust operator. The methodology we put forward relies on the symbiotic association of a secure gates library and on a strategy for their geometrically balanced place-and-route. The SCA experimental benches and the attack software are described into the manuscript appendices.
Last Change 2011-10-29 09:28:54
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Sylvain Guilley's Students

Sumanta Chaudhuri - Asynchronous FPGA Architectures for Cryptographic Applications (implementation)
Selmane Nidhal - Global and local Fault attacks on AES cryptoprocessor: Implementation and Countermeasures (secret-key cryptography)
Laurent Sauvage - Cartographie électromagnétique pour la cryptanalyse physique (implementation)
Pablo Rauzy - Formal software methods against side-channel attacks (implementation)
Abdelaziz Elaabid - Side channel attacks: advanced experimentations on template attacks (secret-key cryptography)

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