Berkant Ustaoglu: Key establishment - security models, protocols and usage
Name: Berkant Ustaoglu
Topic: Key establishment - security models, protocols and usage
Category: cryptographic protocols
Key establishment is the process whereby two or more parties derive a shared secret, typically used for subsequent confidential communication. However, identifying the exact security requirements for key establishment protocols is a non-trivial task. This thesis compares, extends and merges existing security definitions and models for key establishment protocols.\r\n\r\n
The primary focus is on two-party key agreement schemes in the public-key setting. On one hand new protocols are proposed and analyzed in the existing Canetti-Krawzcyk model. On the other hand the thesis develops a security model and novel definition that capture the essential security attributes of the standardized Unified Model key agreement protocol. These analyses lead to the development of a new security model and related definitions that combine and extend the Canetti-Krawzcyk pre- and post- specified peer models in terms of provided security assurances.\r\n\r\n
The thesis also provides a complete analysis of a one-pass key establishment scheme. There are security goals that no one-pass key establishment scheme can achieve, and hence the two-pass security models and definitions need to be adapted for one-pass protocols. The analysis provided here includes the description of the required modification to the underlying security model. Finally, a complete security argument meeting these altered conditions is presented as evidence supporting the security of the one-pass scheme.\r\n\r\n
Lastly, validation and reusing short lived key pairs are related to efficiency, which is a major objective in practice. The thesis considers the formal implication of omitting validation steps and reusing short lived key pairs. The conclusions reached support the generally accepted cryptographic conventions that incoming messages should not be blindly trusted and extra care should be taken when key pairs are reused.[...]
Experienced Researchers in Cryptology, Galician Research and Development Center in Advanced Telecommunications (Gradiant), Vigo, Spain
We are looking for a senior researcher with a strong background on cryptology and its mathematical foundations, with a strong motivation for carrying out applied research in this field and leading projects focused on practical applications.
Research experience is required in at least one of the following topics: secure identity management, privacy by design, trusted computing and secure computation outsourcing, network security, design of efficient cryptosystems, digital rights management, security and usability.
Experienced researcher or 4-10 yrs (Post-Doc)
Nr. Job Positions : 1
IT Hardware Security Engineer – Smartcards, APPLUS - LGAI DIVISION Barcelona
Applus+ is seeking an IT Hardware Security Engineer to participate in security evaluations in smartcards and Integrated Circuits.
This is a long term contract position working at the headquarters ITC security laboratory of Applus+ based in Bellaterra (Barcelona). It is important to note that some projects will be in collaboration with one of the site security laboratories that Applus+ has in Shanghai (China), so for this job position is also required travel availability.
We are hiring hardware security analyst with the aim of widen our hardware security team. He/She will be in charge of evaluations related to secure applications/platforms (as banking or identification) using the testing as a tool to investigate possible bugs or security warnings that can be exploited using Side-Channel or Fault analysis attacks. The candidate should have the following skills and knowledge:
- Strong background in Cryptography algorithms. (AES, DES, RSA, ECDSA…)
- Expertise in Side-Channel attacks (SPA, DPA, DEMA, SEMA, CPA, Timing…)
- Expertise in DFA attacks(Laser, glitches...)
- Knowledge in Smart Cards and HSM (Hardware Security Modules), specially hardware architecture design.
- Experience in programming (C, C++, Java..).
- Knowledge in banking security and related specifications.
- ISO 7816 and ISO14443.
- Knowledge in Common Criteria specifications.
- Knowledge in analog and digital signal processing and circuitry development experience for tools development.
High level of written and spoken English is required.
Report on Fault Diagnosis and Tolerance in Cryptography Workshop (FDTC 2011) September 28, 2011, Nara, Japan (ICW)
FDTC 2011 was held in Nara, on the 28-th of September 2011. The workshop attracted 117 participants from 10 countries, in descending order, from Asia, Europe and North America. The technical program included 12 papers: two invited presentations, and 10 regular papers, categorized into four sessions, that were selected from 18 submissions. Each paper was reviewed by at least 3 reviewers and detailed discussions were later conducted to reach final decisions. Most of the presentation slides for the technical sessions are now available on the workshop website. The workshop proceedings were published by IEEE CS Press and will soon be available on the IEEE Digital Library.
Ingrid Verbauwhede from Leuven University (Belgium) and Rob Bekkers from Brightsight (The Netherlands), delivered the two invited lectures on the topics "The Fault Attack Jungle – A Classification Model to Guide You" and "Fault Injection – A Fast Moving Target in Evaluations," respectively.
Junko Takahashi from NTT (Japan) and Sylvain Guilley from Telecom ParisTech (France), were the program co-chairs. David Naccache from Ecole Normale Supérieure (France) was the invited presentations chair.
We thank the sponsors for their generous support and contributions to the success of the conference, as well as Akashi Satoh for his continuous support of FDTC, and Tetsuya Izu and Yumi Sakemi for their tremendous help with the local arrangements.
Report on CHES 2011, Nara, Japan, Sept 28-Oct 1
CHES 2011 was held at Todai-ji Cultural Center, Nara, Japan,
from September 28 to October 1, 2011.
The program co-chairs were Bart Preneel and Tsuyoshi Takagi,
and the general chair was Akashi Satoh. CHES 2011 received
119 submissions from 26 different countries, and 32 papers
were selected for publication in the proceedings.
Two invited talks were given by Tetsuya Tominaga (NTT) and
Ernie Brickell (Intel) on the topics "Standardization Works
for Security of Electromagnetic Environment" and "Technologies
to Improve Platform Security", respectively.
The conference banquet and the rump session were held at
Hotel Nikko Nara on Friday evening. The best paper award
was also presented during the banquet to Michael Hutter
and Erich Wenger for their work "Fast Multi-Precision
Multiplication for Public-Key Cryptography on Embedded
All presentation slides for the technical sessions including
the invited talks and the rump session can be found on the
workshop website at
The workshop ended successfully on October 1, having
attracted 315 participants (60 being students), from
27 countries, mainly from Asia (162), Europe (98) and
North America (47). We thank the sponsors for their
generous support and contributions to the success of