International Association for Cryptologic Research

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2015-03-04
19:17 [Pub][ePrint] Memory-saving computation of the pairing final exponentiation on BN curves, by Sylvain DUQUESNE and Loubna GHAMMAM

  In this paper, we describe and improve efficient methods for computing

the hard part of the final exponentiation of pairings on Barreto-Naehrig

curves.

Thanks to the variants of pairings which decrease the length of the Miller

loop, the final exponentiation has become a significant component of the

overall calculation. Here we exploit the structure of BN curves to improve

this computation.

We will first present the most famous methods in the literature that en-

sure the computing of the hard part of the final exponentiation. We are

particularly interested in the memory resources necessary for the implementation of these methods. Indeed, this is an important constraint in

restricted environments.

More precisely, we are studying Devegili et al. method, Scott et al. addition chain method and Fuentes et al. method. After recalling these methods and their complexities, we determine the number of required registers

to compute the final result, because this is not always given in the literature. Then, we will present new versions of these methods which require

less memory resources (up to 37%). Moreover, some of these variants are

providing algorithms which are also more efficient than the original ones.



19:17 [Pub][ePrint] Improving Modular Inversion in RNS using the Plus-Minus Method, by Karim Bigou and Arnaud Tisserand

  The paper describes a new RNS modular inversion algorithm based on the extended Euclidean algorithm and the plus-minus trick. In our algorithm, comparisons over large RNS values are replaced by cheap computations modulo 4. Comparisons to an RNS version based on Fermat\'s little theorem were carried out. The number of elementary modular operations is significantly reduced: a factor 12 to 26 for multiplications and 6 to 21 for additions. Virtex 5 FPGAs implementations show that for a similar area, our plus-minus RNS modular inversion is 6 to 10 times faster.



19:17 [Pub][ePrint] Practical Homomorphic MACs for Arithmetic Circuits, by Dario Catalano and Dario Fiore

  Homomorphic message authenticators allow the holder of a (public) evaluation key to perform computations over previously authenticated data, in such a way that the produced tag $\\sigma$ can be used to certify the authenticity of the computation. More precisely, a user knowing the secret key $\\sk$ used to authenticate the original data, can verify that $\\sigma$ authenticates the correct output of the computation. This primitive has been recently formalized by Gennaro and Wichs, who also showed how to realize it from fully homomorphic encryption. In this paper, we show new constructions of this primitive that, while supporting a smaller set of functionalities (i.e., polynomially-bounded arithmetic circuits as opposite to boolean ones), are much more efficient and easy to implement. Moreover, our schemes can tolerate any number of (malicious) verification queries. Our first construction relies on the sole assumption that one way functions exist, allows for arbitrary composition (i.e., outputs of previously authenticated computations can be used as inputs for new ones) but has the drawback that the size of the produced tags grows with the degree of the circuit. Our second solution, relying on the $D$-Diffie-Hellman Inversion assumption, offers somewhat orthogonal features as it allows for very short tags (one single group element!) but poses some restrictions on the composition side.



19:17 [Pub][ePrint] Zero-knowledge Argument for Polynomial Evaluation with Application to Blacklists, by Stephanie Bayer and Jens Groth

  Verification of a polynomial\'s evaluation in a secret committed value plays a role in cryptographic applications such as non-membership or membership proofs. We construct a novel special honest verifier zero-knowledge argument for correct polynomial evaluation. The argument has logarithmic communication cost in the degree of the polynomial, which is a significant improvement over the state of the art with cubic root complexity at best. The argument is relatively efficient to generate and very fast to verify compared to previous work. The argument has a simple public-coin 3-move structure and only relies on the discrete logarithm assumption.

The polynomial evaluation argument can be used as a building block to construct zero-knowledge membership and non-membership arguments with communication that is logarithmic in the size of the blacklist. Non-membership proofs can be used to design anonymous blacklisting schemes allowing online services to block misbehaving users without learning the identity of the user. They also allow the blocking of single users of anonymization networks without blocking the whole

network.



19:17 [Pub][ePrint] Tighter Reductions for Forward-Secure Signature Schemes, by Michel Abdalla and Fabrice Benhamouda and David Pointcheval

  In this paper, we revisit the security of factoring-based signature schemes built via the Fiat-Shamir transform and show that they can admit tighter reductions to certain decisional complexity assumptions such as the quadratic-residuosity, the high-residuosity, and the $\\phi$-hiding assumptions. We do so by proving that the underlying identification schemes used in these schemes are a particular case of the lossy identification notion recently introduced by Abdalla et al. at Eurocrypt 2012. Next, we show how to extend these results to the forward-security setting based on ideas from the Itkis-Reyzin forward-secure signature scheme. Unlike the original Itkis-Reyzin scheme, our construction can be instantiated under different decisional complexity assumptions and has a much tighter security reduction. Finally, we show that the tighter security reductions provided by our proof methodology can result in concrete efficiency gains in practice, both in the standard and forward-security setting, as long as the use of stronger security assumptions is deemed acceptable. All of our results hold in the random oracle model.



19:17 [Pub][ePrint] SCA Resistance Analysis of Sponge based MAC-PHOTON, by N. Nalla Anandakumar

  PHOTON is a lightweight hash function which was proposed

by Guo et al. in CRYPTO 2011 for low-resource ubiquitous computing

devices such as RFID tags, wireless sensor nodes and smart cards. In

this paper, we analyze Side-Channel Attack (SCA) resistance of FPGA

(Field-Programmable Gate Array) implementations of the PHOTON, when

it is used with a secret key to generate a Message Authentication Code (MAC). First, we describe three architectures of the MAC-PHOTON based on the concepts of iterative, folding and unrolling, and we provide their performance results on the Xilinx Virtex-5 FPGAs. Second, we analysed security of the MAC-PHOTON against side-channel attack using a SASEBOGII development board.



19:17 [Pub][ePrint] Side-Channel Protection by Randomizing Look-Up Tables on Reconfigurable Hardware - Pitfalls of Memory Primitives, by Pascal Sasdrich and Oliver Mischke and Amir Moradi and Tim Güneysu

  Block Memory Content Scrambling (BMS), presented at CHES 2011, enables an effective way of first-order side-channel protection for cryptographic primitives at the cost of a significant reconfiguration time for the mask update. In this work we analyze alternative ways to implement dynamic first-order masking of AES with randomized look-up tables that can reduce this mask update time. The memory primitives we consider in this work include three distributed RAM components (RAM32M, RAM64M, and RAM256X1S) and one BRAM primitive (RAMB8BWER). We provide a detailed study of the area and time overheads of each implementation technique with respect to the operation (encryption) as well as reconfiguration (mask update) phase. We further compare the achieved security of each technique to prevent first-order side-channel leakages. Our evaluation is based on one of the most general forms of leakage assessment methodology known as non-specific t-test. Practical SCA evaluations (using a Spartan-6 FPGA platform) demonstrate that solely the BRAM primitive but none of the distributed RAM elements can be used to realize an SCA-protected implementation.



19:17 [Pub][ePrint] Side-Channel Security Analysis of Ultra-Low-Power FRAM-based MCUs, by Amir Moradi and Gesine Hinterwälder

  By shrinking the technology and reducing the energy requirements of integrated circuits, producing ultra-low-power devices has practically become possible. Texas Instruments as a pioneer in developing FRAM-based products announced a couple of different microcontroller (MCU) families based on the low-power and fast Ferroelectric RAM technology. Such MCUs come with embedded cryptographic module(s) as well as the assertion that - due to the underlying ultra-low-power technology - mounting successful side-channel analysis (SCA) attacks has become very difficult. In this work we practically evaluate this claimed hardness by means of state-of-the-art power analysis attacks. The leakage sources and corresponding attacks are presented in order to give an overview on the potential risks of making use of such platforms in security-related applications. In short, we partially confirm the given assertion. Some modules, e.g., the embedded cryptographic accelerator, can still be attacked but with slightly immoderate effort. On the contrary, the other leakage sources are easily exploitable leading to straightforward attacks being able to recover the secrets.



19:17 [Pub][ePrint] Evaluating the Duplication of Dual-Rail Precharge Logics on FPGAs, by Alexander Wild and Amir Moradi and Tim Güneysu

  Power-equalization schemes for digital circuits aim to harden cryptographic designs against power analysis attacks. With respect to dual-rail logics most of these schemes have originally been designed for ASIC platforms, but much efforts have been spent to map them to FPGAs as well. A particular challenge is here to apply those schemes to the predefined logic structures of FPGAs (i.e., slices, LUTs, FFs, and routing switch boxes) for which special tools are required. Due to the absence of such routing tools Yu and Schaumont presented the idea of duplicating (i.e., dualizing) a fully-placed-and-routed dual-rail precharge circuit with equivalent routing structures on an FPGA. They adopted such architecture from WDDL providing the Double WDDL (DWDDL)scheme.

In this work we show that this general technique - regardless of the underlying dual-rail logic - is incapable to properly prevent side-channel leakages. Besides theoretical investigations on this issue we present practical evaluations on a Spartan-6 FPGA to demonstrate the flaws in such an approach. In detail, we consider an AES-128 encryption module realized by three dual-rail precharge logic styles as a case study and show that none of those schemes can provide the desired level of protection.





2015-03-03
18:52 [Job][New] Research Scientist, Senior Research Scientist, Nanyang Technological University, Singapore

  Tamesek Laboratories at Nanyang Technological University in Singapore is looking for both junior and senior researchers, to fill 3 positions of Research Scientists, or Senior Research Scientists, on the areas of symmetric key cryptography and lightweight cryptography. Both fresh PhD and experienced researchers are welcome to apply.

Salaries are globally competitive and are determined according to the successful applicants accomplishments, experience and qualifications. Review process starts immediately and will continue until all positions are filled.

00:11 [Job][New] Ph.D. position, Ruhr-University Bochum, Horst-Goertz Institute

  We are looking for outstanding candidates for a PhD position with strong interest in cryptography, and in particular practice-oriented provable security. Topics of interest may include: provable security of cryptographic implementations, security analysis of random number generators, cryptographic protocols, computer-assisted security proofs.

The PhD position is funded by the the DFG Research Training Group UbiCrypt, which is part of the Horst-Goertz-Institute. The Horst-Görtz-Institut is a leading university-based institution for interdisciplinary research in the field of IT security and cryptography and offers an attractive research environment.

Applicants are required to have completed (or be close to completing) a Bachelor, Master, or Diplom with outstanding grades in Computer Science, Mathematics, or closely related areas. Additional knowledge in related disciplines such as, e.g., complexity theory or IT security is welcome. The working and teaching language is English.

Please send your application to Sebastian Faust via e-mail. Applications should contain a CV, a short letter of motivation, copies of transcripts and certificates, and (if possible) names of references. Review of applications will start immediately until the position has been filled.