International Association for Cryptologic Research

International Association
for Cryptologic Research

IACR News item: 14 November 2015

Anissa Sghaier, Loubna Ghammam, Medyen Zeghid, Sylvain Duquesne, Mohsen Machhout.
ePrint Report ePrint Report
To have an efficient asymmetric key encryption scheme, such as elliptic

curves, hyperelliptic curves, pairing ... etc we have to go through

arithmetic optimization then hardware optimization. Regarding restricted

environments\' compromises, we should strike a balance between efficiency

and memory resources. For this reason, we studied the mathematical aspect

of pairing computation and gave new development of the methods

that compute the hard part of the final exponentiation in [1]. They prove

that these new methods save an important number of temporary variables

and they are certainly faster than the existing one. In this paper, we will

also present a new way of computing Miller loop, more precisely in the

doubling algorithm, so we will use this result and the arithmetic optimization

presented in [1], then we will apply hardware optimization to find a

satisfactory design which give the best compromise between area occupation

and execution time. Our hardware implementation, on a Virtex-6

FPGA(XC6VHX250T), used only 9476 Slices, which is less resources used

compared with state-of-the-art hardware implementations, so we can say

that our

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