IACR News item: 16 July 2015
Hwajeong Seo, Zhe Liu, Yasuyuki Nogami, Jongseok Choi, Howon Kim
ePrint Report
In this paper, we show efficient implementations of binary field multiplication over ARMv8.
We exploit an advanced 64-bit polynomial multiplication (\\texttt{PMULL}) supported by ARMv8
and conduct multiple levels of asymptotically faster Karatsuba multiplication.
Finally, our method conducts binary field multiplication within 57 and 153 clock cycles for B-251 and B-571, respectively.
Our proposed method on ARMv8 improves the performance by a factor of $5.5 \\sim 7.2$ times than previous techniques on ARMv7.
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