International Association
for Cryptologic Research

The main objective of the research in the group Applied Cryptography & Telecom is to propose efficient and robust hardware architectures aimed at applied cryptography and telecom that are resistant to passive and active cryptographic attacks. Currently, the central theme of this research consists in designing architectures for Secure Embedded Systems implemented in logic devices such as FPGAs and ASICs. More information on http://laboratoirehubertcurien.fr/spip.php?rubrique29

The PhD thesis will take part of the European H2020 Project HECTOR (Hardware Enabled CrypTOgraphy and Randomness) aims at bridging the gap between the mathematics of cryptography with the reality of hardware implementations. HECTOR consortium: Technickon (Austria), KU Leuven (Belgium), Univ. Jean Monnet St-Etienne (France), TU Graz (Austria), THALES Comm. & Security SAS (France), STMicroelectronics Rousset SAS (France), STMicroelectronics SRL (Italia), Brighstsight (Netherlands), Micronic (Slovakia).

Objective of this thesis is to propose a set of tools that would allow simplifying physical unclonable functions (PUFs) design and security assessment.

We are looking for candidates with an outstanding Master in electrical engineering. Strong knowledge in VLSI design, FPGA & ASIC design are required. A first experience with PUF or TRNG design would be also appreciated. Notions of stochastic modelling will be a bonus. Skills in oral presentation and scientific writing in English are required (French is not required but recommended).

The PhD position will start before October 2015, it is funded for 36 months.