Making NTRUEncrypt and NTRUSign as Secure as Standard Worst-Case Problems over Ideal Lattices, by Damien Stehlé and Ron Steinfeld
NTRUEncrypt, proposed in 1996 by Hoffstein, Pipher and Silverman, is the fastest known lattice-based encryption scheme. Its moderate key-sizes, excellent asymptotic performance and conjectured resistance to quantum computers make it a desirable alternative to factorisation and discrete-log based encryption schemes. However, since its introduction, doubts have regularly arisen on its security and that of its digital signature counterpart. In the present work, we show how to modify NTRUEncrypt and NTRUSign to make them provably secure in the standard (resp. random oracle) model, under the assumed quantum (resp. classical) hardness of standard worst-case lattice problems, restricted to a family of lattices related to some cyclotomic fields.
Our main contribution is to show that if the secret key polynomials of the encryption scheme are selected from discrete Gaussians, then the public key, which is their ratio, is statistically indistinguishable from uniform over its range. We also show how to rigorously extend the encryption secret key into a signature secret key. The security then follows from the already proven hardness of the R-SIS and R-LWE problems.
Efficient Multiplier for pairings over Barreto-Naehrig Curves on Virtex-6 FPGA, by Riadh Brinci, Walid Khmiriy, Mefteh Mbarekz, Abdellatif Ben Raba^a, Ammar Bouallegue and Faouzi Chekir
This paper is devoted to the design of a 258- bit multiplier for computing pairings over Barreto-Naehrig (BN) curves at 128-bit security level. The proposed design is optimized for Xilinx field programmable gate array (FPGA).
Each 258-bit integer is represented as a polynomial with five,65 bit signed integer, coefficients . Exploiting this splitting we designed a pipelined 65-bit multiplier based on new Karatsuba-Ofman variant using non-standard splitting to fit to the Xilinx embedded digital signal processor (DSP) blocks.
Our architecture is able to compute 258-bit multiplication suitable for BN curves using only 11 in-built DSP blocks available on Virtex-6
Xilinx FPGA devices. It is the least DSP blocks consumption in the known literature. This work can be extended to efficiently compute pairings at higher security levels.
Dries Schellekens: Design and Analysis of Trusted Computing Platforms
Name: Dries Schellekens
Topic: Design and Analysis of Trusted Computing Platforms
This thesis deals with the analysis and design of trusted computing platforms. Trusted computing technology is a relatively new enabling technology to improve the trustworthiness of computing platforms. With minor changes to the boot process and the addition of a new hardware security component, called TPM (Trusted Platform Module), trusted computing platforms offer the possibility to verifiably report their integrity to external parties (i.e., remote attestation) and to bind information to a specific platform (i.e., sealed storage).
The first part of this thesis mainly focuses on the analysis of existing trusted computing platforms. We analyze the functionality provided by the specifications of the TCG (Trusted Computing Group) and purely software-based alternatives. Based on this analysis we present an improvement to a software-based attestation scheme: we propose to measure the execution time of a memory checksum function locally (with the time stamping functionality of the TPM) instead of remotely (over the network).
We also study the resilience of trusted computing platforms against hardware attacks. We describe how attacks on the communication interface of the TPM can circumvent the measured boot process. The feasibility of these attacks is investigated in practice. Additionally we explore which operations should be targeted with a side channel attack to extracts the secret keys of a TPM.
The second part of this thesis addresses some of the challenges to implement trusted computing technology on embedded and recon?gurable devices. One of the main problems when integrating a TPM into a system-on-chip design, is the lack of on-chip reprogrammable non volatile memory. We develop schemes to securely externalize the non-volatile storage of a TPM. One scheme relies a new security primitive, called a reconfigurable physical unclonable function, and another extends the security perimeter of the TPM to the external memory with a cryptographic prot[...]
Research + Teaching Assistant / Ph.D. student, University of Applied Sciences Offenburg, Germany
The Department of Media and Information Technology is looking for a research and research assistant in the field of applied cryptography. The possibility to earn a PhD degree in cooperation with the University of Mannheim is given.
- Active and self-reliant participation in research projects in the area of applied cryptography, e.g. on topics in light-weight cryptography or in analysis of cryptographic protocols and interfaces.
- Assisting in computer science teaching (in particular tutoring).
- Administration of the IT security lab (computer pool).
- Master degree or equivalent in mathematics, computer science, or similar.
- Very good skills in mathematics (in particular algebra and combinatorics) and computer science (in particular programming and algorithmics).
- First experience in cryptography and IT security.
- Basic knowledge in system administration (Linux, Windows).
- Fluent English (both spoken and written).
The position is initially for two years, with possibility for extension upon successful progress in the PhD studies.