IACR News item: 23 June 2012
PhD Database
Name: Sujoy Sinha Roy
Topic: Design and Analysis of Elliptic Curve Cryptosystems on FPGAs
Category: implementation
Description: The thesis explores compact and efficient iplementation of elliptic curve cryptography (ECC) on hardware platforms over extended binary fields. \r\nEfficiency of an elliptic curve cryptoprocessor is largely affected by the underlying finite field primitives and by the architecture of the elliptic curve scalar multiplier (ECSM). The work presented in this thesis contributes in designing efficient finite field algorithms by utilizing the Lookup Tables (LUTs) present in FPGAs. The thesis develops a generalization of the Itoh-Tsujii inversion algorithm (ITA) to use higher exponentiation circuits instead of the conventional squaring circuits. Finally the thesis integrates efficient finite field primitives and explores the concept of pipelining to develop a high speed ECSM architecture. The delay of the critical paths of the ECSM architecture have been estimated by a theoretical model and have been split into optimal delay stages. The thesis develops optimal scheduling technique for pipelined ECSM architecture. The work analyzes the effect of increase in number of pipeline stages on the scalar multiplication time and estimates the optimal\r\nnumber of pipelined stages in the ECSM architecture for a given finite field. Finally detailed analysis, supported with experimental results have been provided to design the fastest reported scalar multiplier in GF(2^163). The proposed design has a three stage pipeline and takes less than 13 us, as compared to 20 us required in the previous best design by Chelton and Benaissa on Virtex 4 FPGAs. Notably, the current design has an area requirement of only 56% compared with the reported work, owing to the better LUT utilizations of the underlying finite field primitives.[...]
Topic: Design and Analysis of Elliptic Curve Cryptosystems on FPGAs
Category: implementation
Description: The thesis explores compact and efficient iplementation of elliptic curve cryptography (ECC) on hardware platforms over extended binary fields. \r\nEfficiency of an elliptic curve cryptoprocessor is largely affected by the underlying finite field primitives and by the architecture of the elliptic curve scalar multiplier (ECSM). The work presented in this thesis contributes in designing efficient finite field algorithms by utilizing the Lookup Tables (LUTs) present in FPGAs. The thesis develops a generalization of the Itoh-Tsujii inversion algorithm (ITA) to use higher exponentiation circuits instead of the conventional squaring circuits. Finally the thesis integrates efficient finite field primitives and explores the concept of pipelining to develop a high speed ECSM architecture. The delay of the critical paths of the ECSM architecture have been estimated by a theoretical model and have been split into optimal delay stages. The thesis develops optimal scheduling technique for pipelined ECSM architecture. The work analyzes the effect of increase in number of pipeline stages on the scalar multiplication time and estimates the optimal\r\nnumber of pipelined stages in the ECSM architecture for a given finite field. Finally detailed analysis, supported with experimental results have been provided to design the fastest reported scalar multiplier in GF(2^163). The proposed design has a three stage pipeline and takes less than 13 us, as compared to 20 us required in the previous best design by Chelton and Benaissa on Virtex 4 FPGAs. Notably, the current design has an area requirement of only 56% compared with the reported work, owing to the better LUT utilizations of the underlying finite field primitives.[...]
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