National University of Singapore
Micro-architectural timing channels are one of the most popular side channels in modern processors exploited by attackers. The presence of such timing channels enables attackers to recover sensitive information by exploiting dynamic software properties (e.g. time, cache misses, and memory access statistics). In the recent decade, the security research community has identified numerous shreds of evidence of practical timing attacks, with more recent and critical attacks reflected in Spectre, and Meltdown. In this project, we will design a secure processor against timing side channels. Our goal is to use a set of ML and computer architecture techniques to propose a countermeasure to deal with realistic timing-channel attacks.
SOC group at the National University of Singapore(NUS) opens a few positions for post-doc researchers and Ph.D. on the topic of Timing side channels.
We are looking for team players who are motivated and able to drive top-quality research. The area of research lies between several fields and we expect in some of the following fields:
- Side-channel analysis
- Machine learning
We will look for applications until the positions are filled. However, prospective applicants are highly encouraged to submit their applications by 31st May 2021.
As one of the top universities in the world for computer science (Ranked number 4), NUS provides excellent future career training and opportunities, research environment, and facilities to international and national academic researchers. Competitive salary, tax benefit, and welfare package will be provided. Note the start date of the post-doc and Ph.D. could be flexible but no later than the end of this year (2021).
Applicants should prepare and send their CV and cover letter to the following contact email.
Last updated: 2021-04-06 posted on 2021-04-04