Yifan Dang
Beijing National Research Center for Information Science and Technology, School of Integrated Circuits, Tsinghua University; State Key Laboratory of Cryptography and Digital Economy Security, Tsinghua University, Beijing, 100084, China

Miloš Grujić
COSIC, KU Leuven, Leuven, Belgium

Bohan Yang
Beijing National Research Center for Information Science and Technology, School of Integrated Circuits, Tsinghua University; State Key Laboratory of Cryptography and Digital Economy Security, Tsinghua University, Beijing, 100084, China

Wenping Zhu
Beijing National Research Center for Information Science and Technology, School of Integrated Circuits, Tsinghua University; State Key Laboratory of Cryptography and Digital Economy Security, Tsinghua University, Beijing, 100084, China

Hanning Wang
Beijing National Research Center for Information Science and Technology, School of Integrated Circuits, Tsinghua University; State Key Laboratory of Cryptography and Digital Economy Security, Tsinghua University, Beijing, 100084, China

Min Zhu
Wuxi Micro Innovation Integrated Circuit Design Co., Ltd., Jiangsu Wuxi, China

Ingrid Verbauwhede
COSIC, KU Leuven, Leuven, Belgium

Leibo Liu
Beijing National Research Center for Information Science and Technology, School of Integrated Circuits, Tsinghua University; State Key Laboratory of Cryptography and Digital Economy Security, Tsinghua University, Beijing, 100084, China

Keywords: True random number, post-processing, entropy extractor, hardware security

Abstract

In cryptographic systems, true random number generation is essential, as a compromised TRNG could lead to a security catastrophe. The raw random numbers are discrete values that are derived at discrete points in time from a noise source of a TRNG. These values often exhibit statistical defects that require post-processing, also called conditioner, to improve uniformity. The two main types of post-processing are algorithmic post-processing and cryptographic post-processing, both of which have pros and cons in theories and applications. However, another type of postprocessing existing between these two types, named entropy extractor, has often been overlooked by the applied cryptographic community. Therefore, we implement two information-theoretically provable entropy extractors: Toeplitz extractor and Trevisan extractor catering to various performance requirements and applications of high-throughput TRNG post-processing. This paper proposes a combination of matrix chunking and FFT acceleration to boost the performance of the Toeplitz extractor, along with a modified Toeplitz matrix design to decrease the hardware consumption. In addition, we introduce a lightweight single-bit extractor to implement an efficient Trevisan extractor. Both algorithms are devised and verified through FPGA hardware simulations. The enhanced Toeplitz extractor achieves a throughput of 42 Gbps, while the Trevisan extractor attains 1.82 Gbps, representing an 84% and 73% improvement in throughput-to-area ratio over the previous best-performing design for each extractor. The standard statistical test suites, such as NIST SP800-22, NIST SP800-90B, and AIS-31, are adopted to evaluate the effectiveness of the proposed post-processing techniques. Naturally, this approach can only serve as a supplementary measure, as modern standards, such as AIS-31, necessitate formal analysis and stochastic models to account for randomness.