International Association for Cryptologic Research
IACR paper details
| Title | An Optimized S-Box Circuit Architecture for Low Power AES Design |
|---|---|
| Booktitle | Cryptographic Hardware and Embedded Systems - CHES 2002, 4th International Workshop, Redwood Shores, CA, USA, August 13-15, 2002, Revised Papers |
| Volume | 2523 |
| Pages | 172-186 |
| Year | 2002 |
| URL | Search for the paper |
| DOI | 10.1007/3-540-36400-5_14 (link) |
| Author | Sumio Morioka |
| Author | Akashi Satoh |
@inproceedings{ches-2002-728,
title={An Optimized S-Box Circuit Architecture for Low Power AES Design},
booktitle={Cryptographic Hardware and Embedded Systems - CHES 2002, 4th International Workshop, Redwood Shores, CA, USA, August 13-15, 2002, Revised Papers},
series={Lecture Notes in Computer Science},
publisher={Springer},
volume={2523},
pages={172-186},
doi={10.1007/3-540-36400-5_14},
author={Sumio Morioka and Akashi Satoh},
year=2002
}