International Association for Cryptologic Research

Publications by Conference

Cryptographic Hardware and Embedded Systems, CHES 2010, 12th International Workshop

Page	Title
1-15	Quark: A Lightweight Hash
16-32	PRINTcipher: A Block Cipher for IC-Printing
33-47	Sponge-Based Pseudo-Random Number Generators
48-64	A High Speed Coprocessor for Elliptic Curve Scalar Multiplications over $F_p$
65-79	Co-Z Addition Formulæ and Binary Ladders on Elliptic Curves - (Extended Abstract)
80-94	Efficient Techniques for High-Speed Elliptic Curve Cryptography
95-109	Analysis and Improvement of the Random Delay Countermeasure of CHES 2009
110-124	New Results on Instruction Cache Attacks
125-139	Correlation-Enhanced Power Analysis Collision Attack
140-157	Side-Channel Analysis of Six SHA-3 Candidates
158-172	Flash Memory 'Bumping' Attacks
173-187	Self-referencing: A Scalable Side-Channel Approach for Hardware Trojan Detection
188-202	When Failure Analysis Meets Side-Channel Attacks
203-218	Fast Exhaustive Search for Polynomial Systems in F₂
219-233	256 Bit Standardized Crypto for 650 GE - GOST Revisited
234-247	Mixed Bases for Efficient Inversion in $F((2^2)^2)^2$ and Conversion Matrices of SubBytes of {AES}
248-263	Developing a Hardware Evaluation Method for SHA-3 Candidates
264-278	Fair and Comprehensive Methodology for Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs
279-293	Performance Analysis of the SHA-3 Candidates on Exotic Multi-core Architectures
294-305	XBX: eXternal Benchmarking eXtension for the SUPERCOP Crypto Benchmarking Framework
306-319	Public Key Perturbation of Randomized RSA Implementations
320-334	Fault Sensitivity Analysis
335-350	An Alternative to Error Correction for SRAM-Like PUFs
351-365	New High Entropy Element for FPGA Based True Random Number Generators
366-382	The Glitch PUF: A New Delay-PUF Architecture Exploiting Glitch Shapes
383-397	Garbled Circuits for Leakage-Resilience: Hardware Implementation and Evaluation of One-Time Programs - (Full Version)
398-412	ARMADILLO: A Multi-purpose Cryptographic Primitive Dedicated to Hardware
413-427	Provably Secure Higher-Order Masking of AES
428-442	Algebraic Side-Channel Analysis in the Presence of Errors
443-455	Coordinate Blinding over Large Prime Fields