International Association for Cryptologic Research

Publications by Conference

Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings

Preface and frontmatter

Page	Title
1-13	A First-Order DPA Attack Against AES in Counter Mode with Unknown Initial Counter
14-27	Gaussian Mixture Models for Higher-Order Side Channel Analysis
28-44	Side Channel Cryptanalysis of a Higher Order Masking Scheme
45-62	High-Speed True Random Number Generation with Logic Gates Only
63-80	FPGA Intrinsic PUFs and Their Use for IP Protection
81-94	Evaluation of the Masked Logic Style MDPL on a Prototype Chip
95-106	Masking and Dual-Rail Logic Don't Add Up
107-120	DPA-Resistance Without Routing Constraints?
121-134	On the Power of Bitslice Implementation on Intel Core2 Processor
135-147	Highly Regular Right-to-Left Algorithms for Scalar Multiplication
148-165	MAME: A Compression Function with Reduced Hardware Requirements
166-180	Collision Attacks on AES-Based MAC: Alpha-MAC
181-194	Secret External Encodings Do Not Prevent Transient Fault Analysis
195-208	Two New Techniques of Side-Channel Cryptanalysis
209-226	AES Encryption Implementation and Analysis on Commodity Graphics Processing Units
227-238	Multi-gigabit GCM-AES Architecture Optimized for FPGAs
239-255	Arithmetic Operators for Pairing-Based Cryptography
256-271	FPGA Design of Self-certified Signature Verification on Koblitz Curves
272-288	How to Maximize the Potential of FPGA Resources for Modular Exponentiation
289-302	TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks
303-319	Power Analysis Resistant AES Implementation with Instruction Set Extensions
320-333	Power and EM Attacks on Passive 13.56 MHz RFID Devices
334-345	RFID Noisy Reader How to Prevent from Eavesdropping on the Communication?
346-363	RF-DNA: Radio-Frequency Certificates of Authenticity
364-377	CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method
378-393	Collision Search for Elliptic Curve Discrete Logarithm over GF(2^m) with FPGA
394-412	A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations
413-426	Differential Behavioral Analysis
427-442	Information Theoretic Evaluation of Side-Channel Resistant Logic Styles
443-449	On the Implementation of a Fast Prime Generation Algorithm
450-466	PRESENT: An Ultra-Lightweight Block Cipher