Minoru Saeki

International Association for Cryptologic Research

Minoru Saeki Search web for home page

	year	title	booktitle	pages
1	2009	A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques	ches	189-204
2	2006	Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style	ches	online
3	2005	DPA Leakage Models for CMOS Logic Circuits	ches	online
4	2004	Random Switching Logic: A Countermeasure against DPA based on Transition Probability	eprint	online