Kris Gaj

International Association for Cryptologic Research

Kris Gaj Search web for home page

	year	title	booktitle	pages
1	2011	Throughput vs. Area Trade-offs in High-Speed Architectures of Five Round 3 SHA-3 Candidates Implemented Using Xilinx and Altera FPGAs	ches	491-506
2	2010	Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs	eprint	online
3	2010	Fair and Comprehensive Methodology for Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs	ches	264-278
4	2008	An Optimized Hardware Architecture for the Montgomery Multiplication Algorithm	pkc	214-228
5	2007	AN OPTIMIZED HARDWARE ARCHITECTURE OF MONTGOMERY MULTIPLICATION ALGORITHM	eprint	online
6	2006	Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware	ches	online
7	2006	FPGA Accelerated Tate Pairing Based Cryptosystems over Binary Fields	eprint	online
8	2004	Efficient Linear Array for Multiplication in GF(2^m) Using a Normal Basis for Elliptic Curve Cryptography	ches	76-91
9	2003	Very Compact FPGA Implementation of the AES Algorithm	ches	319-333
10	2003	Facts and Myths of Enigma: Breaking Stereotypes	eurocrypt	online