International Association for Cryptologic Research
Akashi Satoh Search web for home page
Program Committees
| 1 | 2012 | CHES | pc |
| 2 | 2011 | CHES | general chair |
| 3 | 2010 | CHES | pc |
| 4 | 2008 | CHES | pc |
| 5 | 2007 | CHES | pc |
Publications
| year | title | booktitle | pages | |
|---|---|---|---|---|
| 1 | 2009 | A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques | ches | 189-204 |
| 2 | 2008 | High-Performance Concurrent Error Detection Scheme for AES Hardware | ches | 100-112 |
| 3 | 2008 | Collision-Based Power Analysis of Modular Exponentiation Using Chosen-Message Pairs | ches | 15-29 |
| 4 | 2006 | High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching | ches | online |
| 5 | 2003 | Unified Hardware Architecture for 128-Bit Block Ciphers AES and Camellia | ches | 304-318 |
| 6 | 2002 | An Optimized S-Box Circuit Architecture for Low Power AES Design | ches | 172-186 |
| 7 | 2001 | A Compact Rijndael Hardware Architecture with S-Box Optimization | asiacrypt | 239-254 |
Coauthors of Akashi Satoh |