International Association for Cryptologic Research
Much of the information on this web page was provided courtesy of Michael Ley and the DBLP Project
CHES 2007:
Pascal Paillier and Ingrid Verbauwhede (Eds.):
CHES 2007
Vienna, Austria, September 10-13, 2007,
Preface by Pascal Paillier and Ingrid Verbauwhede (Eds.):
Organizational Committee
Program Committee
External Referees
CHES 2007: 
Pascal Paillier and Ingrid Verbauwhede (Eds.):
Cryptographic Hardware and Embedded Systems - CHES 2007,
9th International Workshop,
Vienna, Austria, September 10-13, 2007,
Proceedings.
Lecture Notes in Computer Science, 4727 Springer 2007, ISBN 978-3-540-74734-5
Vienna, Austria, September 10-13, 2007,
Preface by Pascal Paillier and Ingrid Verbauwhede (Eds.):
Organizational Committee
| Program Co-chairs: | Pascal Paillier (Gemalto, FR) | |
| Ingrid Verbauwhede (KUL, Belgium) | ||
| General Chair: | Elisabeth Oswald (University of Bristol, UK) | |
| Publicity Chair: | Çetin Kaya Koç (Oregon State University, USA) |
Program Committee
| Lejla Batina | Katholieke Universiteit Leuven, Belgium | |
| Guido Bertoni | STMicroelectronics, Italy | |
| Christophe Clavier | Gemalto, France | |
| Jean-Sébastien Coron | University of Luxembourg, Luxembourg | |
| Joan Daemen | STMicroelectronics, Belgium | |
| Ricardo Dahab | Universidade Estadual de Campinas, Brazil | |
| Pierre-Alain Fouque | ENS, France | |
| Kris Gaj | George Mason University, USA | |
| Henri Gilbert | Orange Labs, France | |
| Jim Goodman | ATI Technologies, Canada | |
| Louis Goubin | Université de Versailles, France | |
| Louis Granboulan | EADS, France | |
| Helena Handschuh | Spansion, France | |
| Tetsuya Izu | Fujitsu Laboratories Ltd, Japan | |
| Marc Joye | Thomson R&D, France | |
| çetin Kaya Koç | Oregon State University, USA | |
| Markus Kuhn | University of Cambridge, UK | |
| Pil Joong Lee | Postech, South Korea | |
| Stefan Mangard | Infineon Technologies, Germany | |
| Tsutomu Matsumoto | Yokohama National University, Japan | |
| David Naccache | ENS, France | |
| Christof Paar | Ruhr-Universitauml;t Bochum, Germany | |
| Anand Ragunathan | NEC labs, USA | |
| Josyula R. Rao | IBM T.J. Watson Research Center, USA | |
| Pankaj Rohatgi | IBM T.J. Watson Research Center, USA | |
| Ahmad-Reza Sadeghi | Ruhr-Universität Bochum, Germany | |
| Akashi Satoh | IBM, Japan | |
| Erkay Savas | Sabanci University, Turkey | |
| Patrick Schaumont | Virginia Tech, USA | |
| Kai Schramm | Renesas, UK | |
| Jean-Pierre Seifert | University of Innsbruck, Austria | |
| Berk Sunar | Worcester Polytechnic Institute, USA | |
| Tsuyoshi Takagi | Future University, Hakodate, Japan | |
| Alexander Taubin | Boston University, USA | |
| Pim Tuyls | Philips Research, Netherlands | |
| Kris Tiri | Intel, USA | |
| Frédéric Valette | DGA/CELAR, France | |
| Serge Vaudenay | EPFL, Switzerland | |
| Colin Walter | Comodo CA, UK |
External Referees
Differential and Higher Order Attacks
- Joshua Jaffe:
A First-Order DPA Attack Against AES in Counter Mode with Unknown Initial Counter, (.ps). 1-13
BibTeX - Kerstin Lemke-Rust, Christof Paar:
Gaussian Mixture Models for Higher-Order Side Channel Analysis, (.ps). 14-27
BibTeX - Jean-Sébastien Coron, Emmanuel Prouff, Matthieu Rivain:
Side Channel Cryptanalysis of a Higher Order Masking Scheme, (.ps). 28-44
BibTeX
Random Number Generation and Device Identification
- Markus Dichtl, Jovan Dj. Golic:
High-Speed True Random Number Generation with Logic Gates Only, (.ps). 45-62
BibTeX - Jorge Guajardo, Sandeep S. Kumar, Geert Jan Schrijen, Pim Tuyls:
FPGA Intrinsic PUFs and Their Use for IP Protection, (.ps). 63-80
BibTeX
Logic Styles: Masking and Routing
- Thomas Popp, Mario Kirschbaum, Thomas Zefferer, Stefan Mangard:
Evaluation of the Masked Logic Style MDPL on a Prototype Chip, (.ps). 81-94
BibTeX - Patrick Schaumont, Kris Tiri:
Masking and Dual-Rail Logic Don't Add Up, (.ps). 95-106
BibTeX - Benedikt Gierlichs:
DPA-Resistance Without Routing Constraints, (.ps).? 107-120
BibTeX
Efficient Algorithms for Embedded Processors
- Mitsuru Matsui, Junko Nakajima:
On the Power of Bitslice Implementation on Intel Core2 Processor, (.ps). 121-134
BibTeX - Marc Joye:
Highly Regular Right-to-Left Algorithms for Scalar Multiplication, (.ps). 135-147
BibTeX - Hirotaka Yoshida, Dai Watanabe, Katsuyuki Okeya, Jun Kitahara, Hongjun Wu, Özgül Küçük, Bart Preneel:
MAME: A Compression Function with Reduced Hardware Requirements, (.ps). 148-165
BibTeX
Collision Attacks and Fault Analysis
- Alex Biryukov, Andrey Bogdanov, Dmitry Khovratovich, Timo Kasper:
Collision Attacks on AES-Based MAC: Alpha-MAC, (.ps). 166-180
BibTeX - Christophe Clavier:
Secret External Encodings Do Not Prevent Transient Fault Analysis, (.ps). 181-194
BibTeX - Alex Biryukov, Dmitry Khovratovich:
Two New Techniques of Side-Channel Cryptanalysis, (.ps). 195-208
BibTeX
High Speed AES Implementations
- Owen Harrison, John Waldron:
AES Encryption Implementation and Analysis on Commodity Graphics Processing Units, (.ps). 209-226
BibTeX - Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert Felber, Matthias Braendli:
Multi-gigabit GCM-AES Architecture Optimized for FPGAs, (.ps). 227-238
BibTeX
Public-Key Cryptography
- Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto:
Arithmetic Operators for Pairing-Based Cryptography, (.ps). 239-255
BibTeX - Kimmo U. Järvinen, Juha Forsten, Jorma Skyttä:
FPGA Design of Self-certified Signature Verification on Koblitz Curves, (.ps). 256-271
BibTeX - Daisuke Suzuki:
How to Maximize the Potential of FPGA Resources for Modular Exponentiation, (.ps). 272-288
BibTeX
Implementation Cost of Countermeasures
- Reouven Elbaz, David Champagne, Ruby B. Lee, Lionel Torres, Gilles Sassatelli, Pierre Guillemin:
TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks, (.ps). 289-302
BibTeX - Stefan Tillich, Johann Großschädl:
Power Analysis Resistant AES Implementation with Instruction Set Extensions, (.ps). 303-319
BibTeX
Security Issues for RF and RFID
- Michael Hutter, Stefan Mangard, Martin Feldhofer:
Power and EM Attacks on Passive 13.56 MHz RFID Devices, (.ps). 320-333
BibTeX - O. Savry, F. Pebay-Peyroula, F. Dehmas, G. Robert, J. Reverdy:
RFID Noisy Reader How to Prevent from Eavesdropping on the Communication, (.ps).? 334-345
BibTeX - Gerald DeJean, Darko Kirovski:
RF-DNA: Radio-Frequency Certificates of Authenticity, (.ps). 346-363
BibTeX
Special Purpose Hardware for Cryptanalysis
- Tetsuya Izu, Jun Kogure, Takeshi Shimoyama:
CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method, (.ps). 364-377
BibTeX - Guerric Meurice de Dormale, Philippe Bulens, Jean-Jacques Quisquater:
Collision Search for Elliptic Curve Discrete Logarithm over GF(2 m ) with FPGA, (.ps). 378-393
BibTeX - Andrey Bogdanov, Thomas Eisenbarth, Andy Rupp:
A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations, (.ps). 394-412
BibTeX
Side Channel Analysis
- Bruno Robisson, Pascal Manet:
Differential Behavioral Analysis, (.ps). 413-426
BibTeX - François Macé, François-Xavier Standaert, Jean-Jacques Quisquater:
Information Theoretic Evaluation of Side-Channel Resistant Logic Styles, (.ps). 427-442
BibTeX
Problems and Solutions for Lightweight Devices
- Christophe Clavier, Jean-Sébastien Coron:
On the Implementation of a Fast Prime Generation Algorithm, (.ps). 443-449
BibTeX - Andrey Bogdanov, Lars R. Knudsen, Gregor Leander, Christof Paar, Axel Poschmann, Matthew J. B. Robshaw, Yannick Seurin, C. Vikkelsoe:
PRESENT: An Ultra-Lightweight Block Cipher, (.ps). 450-466
BibTeX