International Association for Cryptologic Research

CHES 2004: Boston/Cambridge, MA, USA

Marc Joye and Jean-Jacques Quisquater, (Eds.):
Cryptographic Hardware and Embedded Systems - CHES 2004:
6th International Workshop
Boston/Cambridge, MA, USA,
August 11-13, 2004.
Proceedings.

Preface, by Marc Joye and Jean-Jacques Quisquater

Organizational Committee
Christof Paar (Publicity chair)  Ruhr-Universität Bochum, Germany
Berk Sunar (General chair)  Worcester Polytechnic Institute, USA

Program Committee
Roberto Avanzi  Institute for Experimental Mathematics, Germany
Benoît Chevallier-Mames  Gemplus, France
Claude Crépeau  Mc Gill University, Canada
Marc Girault  France Telecom, France
Jovan Goliç  Telecom Italia, Italy
Marc Joye (co-chair)  Gemplus, France
Seungjoo Kim  Sungkyunkwan University, Korea
çetin Koç  Oregon State University, USA
Paul Kocher  Cryptography Research, USA
François Koeune  K2Crypt, Belgium
Tanja Lange  Ruhr Universität Bochum, Germany
Ruby Lee  Princeton University, USA
Pierre-Yvan Liardet   ST Microelectronics, France
Thomas Messerges  Motorola, USA
Jean-Jacques Quisquater (co-chair)  Université catholique de Louvain, Belgium
Josyula R. Rao  IBM T.J. Watson Research, USA
Kouichi Sakurai  Kyushu University, Japan
Erkay Savaş  Sabanci University, Turkey
Werner Schindler  Bundesamt für Sicherheit in der Informationstechnik, Germany
Jean-Pierre Seifert  Infineon Technologies, Germany
Joseph Silverman   Brown University, USA
Tsuyoshi Takagi   Technische Universität Darmstadt, Germany
Fr{é}d{é}ric Valette   DCSSI, France
Serge Vaudenay   EPFL, Switzerland
Colin Walter   Comodo Research Lab, UK
Sung-Ming Yen  National Central University, Taiwan


Steering Committee
Burton Kaliski   RSA Laboratories, USA
Çetin Koç   Oregon State University, USA
Christof Paar   Ruhr Universität Bochum, Germany
Jean-Jacques Quisquater  Université catholique de Louvain, Belgium
Colin Walter  Comodo Research Lab, UK

External Referees



Side Channels I

Modular Multiplication

Low Resources I

Implementation Aspects

Collisison Attacks

Side Channels II

Falt Attacks

Hardware Implementation I

Side Channels III

Low Resources II

Hardware Implementation II

Authentication and Signatures

Much of the information on this web page was provided courtesy of Michael Ley and the DBLP Project